In conventional computer memory, a sense amplifier is one of the elements that make up the circuitry on a semiconductor memory chip (integrated circuit). A sense amplifier is part of the read circuitry that is used when data is read from the memory; its role is to sense the low power signals from a bit line that represents a data bit (1 or 0) stored in a memory cell, and amplify the small voltage swing or margin to recognizable logic levels so the data can be interpreted properly by logic outside the memory. Typical sense-amplifier circuits consist of two to six (usually four) transistors. Generally, there is one sense amplifier for each column of memory cells, so there may be hundreds or thousands of identical sense amplifiers on a modern memory chip.
In conventional sense amplifiers, however, the sensing margin is degraded with technology scaling due to a decrease in supply voltage, an increase in process variation, and limited sensing current to prevent read disturbances. To combat these problems, designers have turned to tighter magnetic tunnel junction (MTJ) resistance (RL and RH) distributions, higher TMR, or novel bit-cell structures (e.g., separated read and write paths). Unfortunately, these solutions have their own problems, such as poor sense margins and slow speeds along with issues in manufacturing process variations that result in widely varying performance of the circuits. In general, the degradation in the sensing margin is overcome by using offset-canceling circuits. However, these circuits have inherent performance degradation because of the use of a multi-stage sensing operation. Additionally, low energy has become one of the primary concerns with technology scaling due to an exponential increase in leakage current, limited battery capacity in hand-held devices, and limited device scaling (limited scaling of supply voltage, threshold voltage, and gate oxide thickness) makes Dennard scaling stop at 90 nm. That is, transistor area continues to scale at the historic rate, which allows for doubling the number of transistors, while the power per transistor is not scaling at the same rate, leading to the increase in chip power.
Accordingly, there is a need for systems, apparatus, and methods that improve upon conventional approaches including the improved methods, system and apparatus provided hereby. The inventive features that are characteristic of the teachings, together with further features and advantages, are better understood from the detailed description and the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and does not limit the present teachings.